The present invention relates to a method of managing a defect in a flash memory that can store 1-bit or multi-bit information in a single memory cell.
A storage device using a flash memory, which can be electrically erased at once and/or which is a rewritable read-only memory, is employed in portable information equipments, digital cameras or the like. Normally, a storage device using a flash memory, especially an NAND type flash memory, adopts error correction mechanism and registers management information of physical pages. It is judged whether or not a physical block can be used based on the registered management information. The physical page is a minimum unit for programming or reading data. The physical block is a minimum unit for erasing data. The physical block consists of multi physical pages.
The correlation between the physical page and the physical block is shown in FIG. 1. A plurality of bit lines BL (for example, 4224 in number) are connected to a page buffer 101 for programming or reading data. A plurality of word lines WL are connected to a decoder 102. The bit lines BL and the word lines WL are provided in a matrix form. One memory cell 103 is provided at an intersection of every bit line BL and the word line WL. The physical page is a collection of a plurality of memory cells 103 on an arbitrary word line WL. The physical page is a minimum unit for programming or reading data. Accordingly, if the number of bit lines BL is 4224, then a data capacity of the physical page will be 4224 bits.
The physical block is a collection of a plurality of memory cells 103 on a plurality of word lines WL (for example, 8 or 16 in number) between select gates. The physical block is a unit for erasing data. Accordingly, the physical block is a collection of a plurality of physical pages (for example, 8 or 16 in number). If the number of bit lines BL is 4224 and that of word lines WL is 8, then a data capacity of the physical block will be 33792 (i.e. 4224xc3x978) bits.
Conventionally, the storage device using a flash memory stores information such as how may times the data was erased or how may times programming was performed. The number of times a stress is applied to a memory cell, due to erasing or programming of data, is used as a standard to decided whether to prohibit the use of a physical block. Moreover, a physical block that includes a physical page to which an error has actually occurred is not allowed to be used.
However, if the number of times for which a stress is applied to a memory cell or occurrence of error is used as a standard for deciding whether to prohibit use, there is a possibility that the use of a certain physical block including a physical page is prohibited even if the physical page can be used sufficiently continuously by utilizing an error correction function adopting an error correction code.
Assume, for example, a memory device having a function to correct 2-bit errors per physical page. This memory device can make error correction even if 2-bit error occurs to a physical page at the time of data reading, and it is possible to accurately obtain data from this memory device. Thus, the physical block including the physical page can be sufficiently used even if the error has occurred. However, conventionally, such a physical block is prohibited from use.
Moreover, recently attention is being paid to a multi valued cell which can store multi-bit data. Assume, for example, that an error has occurred in multi-bits in one physical page in a flash memory consisting of such multi valued cells. In this case, it is necessary to judge whether the bits to which the error has occurred are bits stored in a single cell or they spread over multi cells.
Assume that a storage device can store 2-bit data in a certain physical page and that it can correct 2-bit error per physical page. In this case, if 2-bit error occurred to a certain physical page and, especially, if the error occurred to 2 bits stored in the same memory cell in the physical page, then the error can be sufficiently corrected.
In addition, even if that memory cell degrades in the future, error may occur only to the 2 bits unless a new error occurs to a different bit (or different bits) in the memory cell in the same physical page. Therefore, it is not necessary to prohibit the use of a physical block including the physical page to which the 2-bit error has occurred.
On the other hand, if a 1-bit error occurs to each of two memory cells in the same physical page, there is a high probability that the two memory cells to which the error has occurred will degrade in the future and that a maximum of 4-bit error may occur. If 3-bit or 4-bit error occurs to the same physical page, it is impossible to correct the error. In this case, therefore, it is necessary to prohibit the use of the physical block including the physical page to which the 2-bit error has occurred. In case of a multi valued cell, it is impossible to accurately judge whether or not a physical block can be used unless strict consideration is given to the positions of a plurality of bits to which the error has occurred.
It is an object of this invention to provide a method of managing a defect in a flash memory capable of accurately judging whether or not a physical block can be used based on the position of a memory cell to which an error has occurred, and an error correction capability.
The method, of managing a defect in a flash memory that stores 1-bit information in a single cell, according to one aspect of this invention comprises the steps of: deciding whether an error has occurred, and if the error has occurred, deciding a number of errors occurring in a one physical page; deciding whether a number of memory cells corresponding to a plurality of bits to which the error has occurred in the one physical page exceeds a predetermined number that is equal to or smaller than the number of bits which can be corrected using an error correction code; and prohibiting use of a physical block including the one physical page for which it is decided that the number of memory cells exceeds the predetermined number.
According to the above-mentioned aspect, if the number of errors which have occurred in the same physical page exceeds a range which can be corrected using the error correction code, then it is judged that an uncorrectable error occurred, and the use of a physical block including such a physical page is prohibited. Thus, according to the present invention, it becomes possible to judge more accurately whether or not the physical block can be used.
The method, of managing a defect in a flash memory that stores multi-bit information in a single cell, according to another aspect of this invention comprises the steps of: deciding whether an error has occurred, and if the error has occurred, deciding a number of errors occurring in a one physical page; deciding whether a total number of bits included in memory cells corresponding to multi-bits to which the error has occurred in the physical page exceeds a predetermined number that is equal to or smaller than the number of bits which can be corrected using an error correction code; and prohibiting use of a physical block including the physical page for which it is decided that the number of memory cells exceeds the predetermined number.
According to the above-mentioned aspect, in case of a flash memory consisting multi valued cells, if a total number of bits included in a memory cell corresponding to an error which has occurred in the same physical page exceeds a range which can be corrected using the error correction code, then it is judged that an uncorrectable error has occurred, and the use of a physical block including such a physical page is prohibited. Because, if the number of errors exceeds the range which can be corrected by the error correction code, then there is a high probability that error will occur in the future. Thus, according to the present invention, it becomes possible to judge more accurately whether or not the physical block can be used.